1. Field of the Invention
The present disclosure relates to the process of depositing a metal on a substrate surface, using a reactor for electroplating, and, in particular, to profile control on ring anode plating chambers.
2. Description of the Related Art
In many technical fields, the deposition of metal layers on a substrate surface is a frequently employed technique. For efficiently depositing relatively thick metal layers on a substrate surface, plating, in the form of electroplating or electroless plating, has proven to be a viable and cost-effective method and, thus, plating has become an attractive deposition method in the semiconductor industry.
Currently, copper is considered a preferred candidate in forming metallization layers in sophisticated integrated circuits, due to the superior characteristics of copper and copper alloys in view of conductivity and resistance to electromigration compared to, for example, the commonly used aluminum. Since copper may not be deposited very efficiently by physical vapor deposition, for example by sputter deposition, with a layer thickness on the order of 1 μm and more, electroplating of copper and copper alloys is the currently preferred deposition method in forming metallization layers. Although electroplating of copper is a well-established technique, reliably depositing copper over large diameter substrates, having a patterned surface including trenches and vias, is a challenging task for process engineers. For example, forming a metallization layer of an ultra-large scale integration device requires the reliable filling of wide trenches with a width on the order of micrometers and also requires the filling of vias and trenches having a diameter or width of 0.2 μm or even less, which is also known as the so-called dual inlaid technology. The situation gains even more in complexity as the diameters of the substrates tend to increase. Currently eight or even ten inch wafers are commonly used in a semiconductor process line. Thus, great efforts are being made in the field of copper plating to provide the copper layer in a desired profile across the substrate surface. At a first glance, it appears to be advantageous that the metal thickness profile across the substrate surface may be formed as uniformly as possible. However, post-plating processes may require a differently shaped profile to assure proper device functionality of the completed integrated circuits. For instance, during the formation of copper-based metallization layers, excess copper may be removed, which is presently often achieved by (electro) chemical mechanical polishing ((e)CMP) of the metal surface. Since the CMP process is per se a highly complex process frequently exhibiting an intrinsic process non-uniformity, i.e., a non-uniform removal rate across the substrate surface, it may be preferable to adapt the metal thickness profile to the post-plating process to achieve in total an improved process uniformity after completion of the post-plating process. Therefore, electroplating tools are often configured to allow a variation of the metal profile, wherein the control of the finally obtained profile presently is, however, cumbersome and time-consuming.
With reference to FIGS. 1a-1b, a typical prior art electroplating system will now be described to illustrate in more detail the problems involved in electroplating copper. In FIG. 1a, there is shown a typical conventional electroplating system 100 including a reactor vessel 101 with a first electrode 102, in this case the anode, having a plurality of individually drivable anode portions 102A-102N, thereby defining a multiple anode configuration. In this example, a so-called fountain-type reactor is considered, in which an electrolyte solution is directed from the bottom of the reactor vessel 101 to the top side and is then re-circulated by a pipe 103 connecting an outlet 104 with a storage tank 107, which in turn is connected to an inlet 105 provided as a passage through the anode 102. The system 100 further comprises a substrate holder 108 that is configured to support a substrate 109, such as a semiconductor wafer, so as to expose a surface of interest to the electrolyte. Moreover, the substrate holder 108 may be configured to act as a second electrode, in this case the cathode, and to provide the electrical connection to a power source 110, which is configured to enable the supply of individual currents of defined magnitude to each of the anode portions 102A-102N.
FIG. 1b schematically shows a top view of the electrode 102 including the multiple anode configuration 102A-102N for four individual anode portions.
Prior to installing the substrate 109 on the substrate holder 108, a thin current distribution layer, possibly including a seed layer, typically provided by sputter deposition, is formed on the surface of the substrate 109 that will receive the metal layer. Thereafter, the substrate 109 is mounted on the substrate holder 108, wherein small contact areas (not shown for the sake of simplicity) provide electrical contact to the power source 110 via the substrate holder 108. By activating a pump (not shown) and applying appropriate voltages between the anode 102, that is, the multiple anode configuration 102A-102N, and the substrate holder 108 that creates respective currents, an electrolyte flow is created within the reactor vessel 101. The electrolyte entering the reactor vessel 101 at the inlet 105 is directed towards the substrate 109, wherein the deposition of metal on the substrate 109 is determined by the flow of electrolyte and the arrangement of the multiple anode configuration 102A-102N, since the local deposition rate of metal on a specific area of the surface of the substrate 109 depends on the number of ions arriving at this area. Hence, by selecting a set of currents supplied to the multiple anode configuration 102A-102N, the finally obtained thickness profile may be determined, wherein, optionally, additional means for influencing the ion and/or electrolyte flow may be inserted in the form of, for instance, a diffuser plate.
Once an appropriate set of currents is adjusted in the power supply 110, the resulting thickness profile is determined by the characteristics of the reactor vessel 101, the electrolyte solution, the set of currents and the plating time. Hence, a variation of one of these characteristics may lead to a drift of the finally obtained thickness profile. The situation is even more complex for an electroplating tool 100 including a plurality of reactor vessels 101 with a corresponding plurality of multiple anode configurations 102A-102N, since then any subtle process fluctuation in any of these reactor vessels may occur and may result in a highly complex mutual interaction of the involved process characteristics, thereby compromising process stability. Thus, a plurality of test substrate runs is typically performed on a regular basis, thereby requiring time and manpower and hence reducing the yield and quality of the plating process.
Increasing complexity of integrated structures leads to further drawbacks of current profile control methods. For instance, forming a metallization layer of an ultra-large scale integration device requires the reliable filling of wide trenches with a width on the order of micrometers, and also requires the filling of vias and trenches having a diameter or width of 0.2 μm or even less. For economical reasons, the different structures, whose dimensions may differ by an order of magnitude, are filled in a continuous process step. The process step has to be subdivided into a step which is optimal for filling small structures and a successive step of filling the large structures. This can be practically done by, for instance, using the pulse reverse current technique, wherein, after each deposition current pulse, a reverse pulse is followed which removes some of the deposited material in order to avoid cavities during the deposition process. The large structures may be filled after the pulse reverse current, for instance, by a direct current method. However, any combination of deposition characteristics may be used according to the process requirements and the intended results. For instance, the direct current step may be replaced by a pulse reverse current step having lower or higher frequencies than the step before.
Therefore, filling small and large structures requires multi-step recipes for the plating process such that more tool parameters have to be considered for the plating process. Also, the process complexity makes plating results sensitive to tool drifts due to wear or consumable status.
Currently, with the multi-anode plating chamber solution, an automatic calculation to adjust the post-plating shape is possible, requiring a constant ratio of the anode currents in all recipe steps.
The present disclosure is directed to various methods that may avoid, or at least reduce, the effects of one or more of the problems identified above.